Synopsys Releases Tool Platform for Design Reuse
Mountain View, CA-based Synopsys Inc. has released an intellectual property (IP) tool that expands its platform for capturing, packaging, and delivering IP cores for system-on-a-chip design. Engineers can use the new tool, dubbed coreBuilder, to develop IP that can be reused in other SOC designs.
coreBuilder guides the capture of synthesis data, designer knowledge, configuration parameters, and implementation/verification procedures. The tool then uses this information to create a coreKit, containing all the elements necessary for configuring and implementing the core.
The coreKit is next read by coreConsultant, which guides the core's end-user in selecting valid configurations within a pre-defined use-envelope (established by the original designer's inputs to coreBuilder), and automatically pilots Synopsys synthesis tools to create an optimal, technology-mapped netlist. Currently supported tools include Design Compiler, Test Compiler, Power Compiler, and PrimeTime.
coreBuilder is specifically designed to seamlessly work with electronic design automation (EDA) tools from Synopsys and other leading manufacturers. coreBuilder is also extensible via Tcl plug-ins, procedures that, when used with the coreBuilder/coreConsultant library of functions, enable customized control of additional design tools.
Synopsys coreBuilder will be available in limited production starting in July 1999 for $150,000 per license. Synopsys coreConsultant is available at no charge to Synopsys customers.
Expanded FPGA offering
In a second announcement, Synopsys announced the release of FPGA Compiler II and FPGA Express version 3.2.
The new field programmable gate array (FPGA) tools provide several new features. These features include support for the APEX20K programmable logic device (PLD) family from Altera, new timing models for Lucent Technologies' ORCA products, and more accurate timing models for Xilinx's XC4000 devices.
The upgraded tools also deliver support for million-gate FPGA devices. Thus, FPGA Compiler and FPGA Express now offer operate with Altera's APEX family and Xilinx's Virtex family of PLDs.
FPGA Compiler II and FPGA Express version 3.2 are tightly integrated with Quartus, Altera's new back-end Place and Route tool. Both products are available via electronic software transfer. They will also be offered in a CD format later in the month.