Synopsys Licenses Simulation Tools to Cadence

N/Ac. (Mountain View, CA) has licensed its PrimeTime static timing analysis (STA) tool and physical library and design data formats known as the Library Exchange Format (LEF) and Data Exchange Format (DEF) to <%=company%> San Jose, CA) for use in design services engagements for systems on a chip (SoC).

"Our design services customers use tools from a variety of suppliers. To offer the most comprehensive services possible, we need to have access to all critical tools used by the industry," said Bob Wiederhold, senior vice president of Worldwide Design Services at Cadence.

"Our mutual customers need access to industry leading tools like PrimeTime to complete their designs, whether they design in-house or elect to use third-party design assistance," said Deirdre Hanford, senior vice president of business and market development at Synopsys. "We have agreed to license Design Compiler, PrimeTime and other technologies to Cadence Design Services to help ensure the success of our mutual customers in implementing system-on-a-chip designs. We will continue to work with Cadence to create and offer solutions that help designers."

PrimeTime is a full-chip, gate-level static timing analysis tool targeted for complex multimillion-gate designs. PrimeTime's integration into logical and physical design flows enables quick debugging of complex timing problems and speeds timing closure

Edited by Winn Hardin, Managing Editor