National Semiconductor's promotes web-based toolset WEBENCH 2.0
WEBENCH 2.0 (WEBENCH.NATIONAL.COM) is a free, interactive collection of online tools that enable a designer to move from component selection to design, analysis and sampling faster than ever before possible. The WEBENCH tools include EasyPLL, a tool for simulating PLL designs, WebSIM, an enhanced version of the power simulation tool released last fall, and WebTHERM, a tool used for thermal design and analysis.
The toolset can be accessed from a number of locations on National's website, but most frequently, through two of National's online design communities, WIRELESS.NATIONAL.COM and POWER.NATIONAL.COM. These communities offer designers research, industry news, product information, tutorials, discussion boards, event calendars, and application support for wireless and power.
Site features:
- Accessed through WIRELESS.NATIONAL.COM, EasyPLL is an interactive online simulator for PLL design and analysis. Entering the desired frequencies will generate an electrical circuit including selections for a PLL, Voltage Controlled Oscillator (VCO), and passive components from a catalog of over 350 devices. The resulting simulations cover PLL and loop filter performance, including phase noise, Bode plots and lock time, enabling complete designs in minutes.
- Launched last October in co-operation with Transim Corp., WebSim integrates the popular Switchers Made Simple software. The four-step process allows any engineer to build power supply circuits, select from over 2000 components from dozens of vendors, perform online simulations, create physical layouts and develop prototypes in a few hours.
- WebTHERM, developed in co-operation with Flomerics Corp., combines physical layout with thermal modeling to generate full-colour thermal images of board designs in minutes. Accessed through POWER.NATIONAL.COM, WebTHERM produces an incredibly accurate thermal picture by calculating the heat transfer and interaction between components on the board and the environment to generate junction temperatures at the die level as well as the thermal envelope for a design.
Edited by Winn Hardin
Managing Editor, Wireless Design Online