Dual-Plane Flash Memory Allow Wireless Systems to Support 3G Services
ContentsThe quantum leap
Persistent data storage considerations
New dual-plane flash memory
Software needs
One step ahead
By: Charles Brown, Intel Corp.
Over the next few years, cellular networks will deploy new high-speed 
wireless data technologies that will not only increase data throughput, but enable new applications and services. Applications such as mobile navigation and other services using maps and graphics will benefit greatly from the enhancement throughput provided by this technology. Users will be capable of remote network and Internet access as if they where connected in their office, making the data enriched phone more attractive and easier to use.
Third-generation (3G), high-speed wireless data technologies will require new handsets to support the enhanced signal processing and a reliable means to store the new information created by the many new applications. This information may be stored on a network server or locally in the handset. There are issues with storing information on the server, namely the time delay to access the information as well as out-of-coverage access. In many instances, it is desirable to store personal information persistently on the device. Timely access to this information makes the handset a more attractive and useful tool.
Handset designers are using flash memory today for persistent storage of user data in addition to the system code. They have turned to software data management techniques, such as Folsom, CA-based Intel's Flash Data Integrator (FDI) to mange this information. The increased data rates and new data structures promised by next generation cellular network will place even greater demands on the memory performance and data manager. New developments in flash memory architecture and flash software data management are now available to support persistent information storage requirements of 3G data technologies at higher data rates.
The quantum leap
High-speed circuit-switched data (HSCSD) and general packet radio services (GPRS) are two new methods that will provide cellular phone users new services such as image transfer, remote local-area network LAN access, Internet access, and more. These new technologies put wireless data rates on par with wireline service, and may mark the dawn of the wireless Internet. Current applications, such as e-mail and remote LAN access, as well as new applications, such as wireless imaging and video, will benefit from higher bit rates.
HSCSD provides data throughput six times faster than that of current wireless data with only minor network software upgrades. This employs a new coding scheme and the ability to combine time slots so that data rates in multiples of 9.6 kb/s or 14.4 kb/s are possible. This means users will be provided with a variety of new data rates, ranging from 9.6 kb/s to 57.6 kb/s.
GPRS, on the other hand, will enable new applications not previously feasible over cellular networks, offering more attractive wireless Internet access. With GPRS, data is encapsulated into individual packets and transmitted over the network. Network capacity is allocated only when data is being sent. Network resources are released as soon as it is no longer needed, after the packet has been sent, providing immediate connectivity and high throughput. GPRS offers a very flexible range of bit rates, from less than 100 b/s to over 100 kb/s. Using links in this way provides for lower cost data service, since network capacity is conserved. Users are charged for the amount of data sent or received, not the time connected to the network. A host of new applications will be within reach with GPRS, including: remote access to business IP networks, mobile credit card verification, electronic commerce, and any number of new data services.
Persistent data storage considerations
Understanding the attributes of these new data connection methods provides insight into the design of the data storage system. HSCSD provides a constant rate data channel that is capable of sending and receiving a continuous stream of data. The handset terminal typically is unaware of the amount of information that needs to store. The amount of available memory and the rate at which information can be stored are essential elements in the design of a robust memory manager.
The circuit switched data manager must accommodate the storage of variable size data structures with unknown length such as data files or digital audio messages. To accomplish this, a free block of memory is required to allow for incoming data to be stored while the system reclaims (erases) old information in preparation for the storage of more incoming data.
An alternative caching method, where the information is buffered in system memory, has been an effective way for computers to manage such information storage. Although a caching architecture is less than efficient for handsets with limited space, budget and power constraints and does not provide a reliable storage method in the event of power loss. As a result, designers have turned to directly storing the information in to flash memory.
The software data manager handles the direct storage of a stream of data into flash memory. The system must provide a means to specify which old information may be reclaimed in the event the amount of incoming data exceeds the amount of free memory space. The process of constantly checking for available memory requires background erase operation to allow for reclaiming of old data while receiving new data.
Figure 1 illustrates the basic concept of managing a circuit switched connection. New data received is appended to a file structure until the entire contents have been stored.
With GPRS, data is arranged into small packets with a header containing the origin, destination address, and size of the data. The packets are then sent individually over the cellular network; packets originating from one user may take different routes through the network to the receiver. No pre-set time is allocated to packet transmission, and packets from the different users are interleaved so that transmission capacity is shared.
Packet data transmission provides the opportunity for the handset software data manager to prepare the storage media prior to the data being sent. Since the data size is contained in the header information, the memory data manager software can reclaim needed memory space or decline to receive the information if no free space is available.
The GPRS data manager must support a handshake communication protocol (Figure 2), whereby the phone acknowledges it is prepared to receive the data and the reception of the individual packets. Data packets are then re-arranged into their original order according to the packet number provided in the header structure.
New dual-plane flash memory
Many currently available flash memories must complete a program or erase operation before data or code can be read from another memory block. Based on the program/erase timing specifications of flash, there is a common misconception that data storage can be supported only when the application can mask interrupts and allow a flash memory write or erase operation to complete. In time-synchronized applications with latencies in the range of microseconds, such as a cellular phone, simultaneous read and write operation can be accomplished using software methods.
Enhanced suspend circuitry allow flash memory program/erase operations to be suspended temporarily to read code from another memory block. Suspend circuits allow time critical operations to be serviced without stalling the microprocessor. Thus, providing software controlled "read-while-write" operation. Suspend circuits do not increase the flash die size (cost), thereby providing the most cost effective solution for basic consumer phones with less demanding data storage needs such as user information, phone settings, and short message service (SMS) messages.
In anticipation of the higher date rates offered by next generation cellular, additional hardware assistance may be needed to allow an erase operation to continue uninterrupted. To accomplish this, the standard flash memory array can be segmented into separate physical planes with duplicate row and column decoders. This dual-plane flash memory (Figure 3) allows the system to write or erase information in one plane of the memory while at the same time the processor is reading instructions from the other plane. For example, this feature allows an erase operation to continue without delay thereby reducing the time it takes to store large data structures during a memory reclaim operation (Figure 4).
Dual-plane flash memory improves data storage throughput by up to 150%, depending on the memory bus utilization (Figure 5). Such an improvement provides a solution for data rates up to hundreds of kb/s to support the evolution of wireless data services.
Software needs
As with other flash products, software is needed to efficiently manage code and data in single- and dual-plane flash designs. The storage, access, and reclamation of data blocks necessitate software intervention.
The approach of data management in dual-plane flash must still support erase suspend operations in the event critical data must be written during a reclamation process. Since access to data in the same plane is necessary, the same software techniques used for software read-while-write in single-plane flash are also required for dual-plane. In addition, software is necessary to provide a common storage interface to the application.
The storage functions for next-generation handsets must accommodate a variety of data structures, including variable-size parameters, data streams, and packet data. The approach of storing data streams and packets is well understood yet intricate due to the need to handle the conditions previously described.
New extensions to software, such as Intel's FDI package, provide support for the storage of circuit switched data and data packets in single- and dual-plane flash. The designer may now choose the flash memory based on the code performance and data throughput needs of the application.
One step ahead
As flash memory management techniques advance, the designer must reconcile the trend toward enriched data management while also balancing cost and hardware capability. Software data managers and new dual-plane flash memory provide the designer a complete solution to accommodate future data enhancements. This capability helps designers and network operators stay one step ahead of changing market needs.
About the author:
Charles Brown is a Wireless Marketing Program Manager for Intel's Folsom, CA-based Flash Products Division. He is responsible for market research and development, as well as product planning for wireless applications of Intel's flash memory components. Brown holds a BSEE from the University of California at Davis, an MS in Electrical Engineering from Stanford University, and a Ph.D. in Electrical Engineering from the University of California at Davis. For more information, call 800-628-8686.
Edited by Robert Keenan