Direct Digital Chirp Synthesizer (DDCS)

The device's GaAs NCO includes a phase accumulator and frequency accumulator, both with 32-bit resolution. The built-in frequency accumulator sets the device apart from conventional DDS sources, which generally utilize single-phase accumulators.
The device includes a DAC and digital synthesizer ASIC in a small hybrid package. It operates on standard ECL supply voltages and is available with or without MIL-PRF-38534 screening. Double-buffered input latches allow the user to generate custom chirp waveforms. It is capable of an output bandwidth of 400 MHz and the IC has been proven to perform at clock rates as high as 1.2 GHz.
A test fixture is also available for evaluating and implementing this device. The evaluation board needs only power, an RF clock source, and an IBM PC compatible for control via an RS232 serial interface.
N/A, 59 Technology Drive, Lowell, MA 01851. Tel: 978-441-0200; Fax: 978-453-6299.