Elanix, Inc.mpany%> SystemView software tool has been integrated with Xilinx's core generator to automate the digital signal processor (DSP) design methodology in field programmable gate array (FPGA) devices. According to Elanix, the combination of SystemView with Xilinx's core generator provides a point-and-click design approach that enables rapid DSP application development in FPGAs.
SystemView is a conceptual design and evaluation engine embedded in a visual design environment. Running on Windows-based systems, this tool provides analog and digital design tools for use in DSP, communications, signal processing, and control applications.
The software tool offers a dynamic system simulator, an intuitive sampled data (z-domain) and continuous (Laplace domain) system specification, mixed time-continuous and time-discrete systems, graphical fast impulse response (FIR) filter design capabilities, as well as built-in system diagnostics and connection checks. In addition, the product provides communications, CDMA/IS-95, DSP, RF/analog, and transistor-transistor logic (TTL) libraries.
To support tight integration with Xilinx's core generator, SystemView includes tokens (functional blocks) representing the functionality of each Xilinx DSP LogiCORE. Designers can build complete system models using these tokens, experimenting with different parameters and cores to determine the optimal values of their system.
After design is complete, SystemView allows the designer to automatically invoke the Xilinx DSP code generator and pass down the list of cores and their appropriate parameters. The Xilinx CoreGen core generator then produces a netlist for each core that is passed to the Xilinx place-and-route software for final implementation into hardware.
The SystemView Xilinx FPGA option is available on Windows NT and Windows 95 platforms. Existing SystemView customers can purchase this option for $795. New SystemView configurations for Xilinx developers start at $2,945.